X . 1) Draw the circuit diagram for the state machine in Quartus prime. Your circuit...

 

Transcribed Image Text:

X . 1) Draw the circuit diagram for the state machine in Quartus prime. Your circuit should include two flip-flops, and OR gates, and AND gates, and possibly, inverters. o Inputs are X and the Clock o Outputs are S1 and S0 Compile and load onto FPGA on DE2i board Fill in the table with the DE2i pins you assigned Clock S1, SO Signal names Physical DE2i name SW KEY LEDG STATE S₁ So X NEXT STATE NS₁ NSo a 0 00 10 0 1 0 1 10 10 1 10 10 10 1 a b b AD с с d d 00 lo 0 0 1 1 1 1 -10 010 00 01 1 0 1 1 a b a d a b a с 1 0 1 10 0 A (00) X=0 D (11) X = 1 X=0 X=1 X=0 X = 1 B (01) X = 1 C (10) X . 1) Draw the circuit diagram for the state machine in Quartus prime. Your circuit should include two flip-flops, and OR gates, and AND gates, and possibly, inverters. o Inputs are X and the Clock o Outputs are S1 and S0 Compile and load onto FPGA on DE2i board Fill in the table with the DE2i pins you assigned Clock S1, SO Signal names Physical DE2i name SW KEY LEDG STATE S₁ So X NEXT STATE NS₁ NSo a 0 00 10 0 1 0 1 10 10 1 10 10 10 1 a b b AD с с d d 00 lo 0 0 1 1 1 1 -10 010 00 01 1 0 1 1 a b a d a b a с 1 0 1 10 0 A (00) X=0 D (11) X = 1 X=0 X=1 X=0 X = 1 B (01) X = 1 C (10)