1. 
   
   You are building an OS using a microkernel-based approach following the principles of the L3 microkernel. The processor architecture you are building this OS for has the following features:

   
   

   A 32-bit hardware address space.

   • Paged virtual memory system (8KB pages) with a processor register called PTBR that points to the page table in memory to enable hardware address translation.

   • A TLB with Address space IDs associated with each TLB entry.

   • A pair of hardware-enforced segment registers (lower and upper bound of virtual addresses) which limit the virtual address space that can be accessed by a process running on the processor.

   • A virtually-indexed physically tagged processor cache.

   
   

   You end up with 2 big subsystems (A and B) that each require 230 bytes of virtual memory space. You also end up with 4 subsystems (C,D,E,F) that require 100x220, 500x220, 1000x220, and 2000x220 bytes of virtual memory, respectively. You want to put each of these subsystems in their own protection domains.

   
   

   (i) (10 points) How would you design the protection domains of these

   subsystems?

   (ii) When would you need to flush the TLB with the above design?

   (iii) These subsystems would need protected procedure calls (PPC) amongst them to implement their respective functionalities. Would the PPC require microkernel intervention? If yes, why?

   (iv) There is a context switch from A to B. What does your OS do to facilitate this context switch?

   (v) There is a context switch from A to C. What does your OS do to facilitate this context switch?

   (vi) There is a context switch from E to F. What does your OS do to facilitate this context switch? 

   (vii) What is the most expensive context switch in your design? Why?

   (viii) What is the explicit cost of context cost in your design? Is it significantly different going between any two subsystems or roughly the same? Justify your answer.