You have a $64-$bit machine and you bought $32$GB of physical memory. Pages are $256$KB$.$ For all

calculations, you must show your work to receive full credit.

$($a$)[1]$ How many virtual pages do you have per process?

$($b$)[1]$ How many bits are needed for the Virtual Page Number $($VPN$)?($Hint: use part $($a$))$

$($c$)[1]$ How many physical pages do you have?

$($d$)[1]$ How many bits are needed for the Physical Page Number $($PPN$)?($Hint: use part $($c$))$

$($e$)[1]$ How big in bytes does a page table entry $($PTE$)$ need to be to hold a single PPN plus a valid bit?

$($f$)[1]$ How big would a flat page table be for a single process, assuming PTEs are the size computed in

part $($e$)?$

$($g$)[10]$ Why does the answer above suggest that a $$flat page table$$ isn$$t going to work for a $64-$bit

system like this? Research the concept of a multi$-$level page table, and briefly define it here. Why

could such a data structure be much smaller than a flat page table?

$($h$)[4]$ Does a TLB miss always lead to a page fault? Why or why not?