Question: You have a system on which addresses are 36 bits long. For each of the following scenarios, determine the cache (data) capacity, number of cache

You have a system on which addresses are 36 bits long. For each of the following scenarios, determine the cache (data) capacity, number of cache blocks, the size (in bytes) of each cache block, the address bits used for the tag, index, and offset (each specified as [high_order:low_order], inclusive, as we did in lecture) and the total amount and percentage of metadata overhead. Obviously, some parameters will be given in each example; you need to calculate the rest. Please include the given parameters in your list. Assume direct- mapped cache unless otherwise noted (a) 32 KB write-through D-cache with 8 byte blocks (b) 16 KB write-back D-cache with 256 blocks (c) 64 KB I-cache with 10 index bits d) Unknown size write-through D-cache with 21 bit tags and 8 byte blocks. (e) 1 MB write-through (combined) 4-way set-associative cache with 32 byte blocks
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