You must complete the following assignment and submit a PDF of relevant questions. Handwritten submis$-$

sions and proprietary formats $($e$.$g$.$ Pages or MS Word$)$ will not be accepted. You will also need to upload Log$-$

icWork circuit design file. Then upload a single ZIP file to Moodle.

Submission File structure:

submission. zip

$-$ circuit$1-1.cct$

$-$ circuit$1-2.cct$

$-$ circuit$1-3.cct$

$-$ circuit$2-1.cct$

$-$ circuit$2-2.cct$

$-$ circuit$2-3.cct$

$-$ circuit$3.cct$

$-$ circuit$4.$cet

$-$ circuit$5.$cet

$-$ circuit$6.$cet

$-$ lib.$clf$

All circuit files are $1pt$ each.

Lab $2$

Save the library and circuit files we created in class containing the following designs in the final ZIP file:

$3-$to$-8$ Decoder implemented using the $2-$to$-4$ Decoder $($circuit $1-1.$ cct$)$;

$4-$to$-2$ priority encoder with validity bit $($circuit$1-2.$ cet$)$;

$4$ channel $4$ bit Multiplexer implemented using the $4$ channel $1$ bit Multiplexers $($circuit $1-3.$cet$)$;

Include the above designs in your library file $($lib$.$clt$),$ I must be able to use these components in

your library file, or $50\%$ of the points will be lost.

Save the library and circuit files we created in class containing the following designs in the final ZIP file:

$4-$bit binary adder $($eireuit$2-1.$cet$)$;

$4-$bit binary adder$-$subtractor with XOR and Adder $($cireuit$2-2$ ect$)$;

$4-$bit binary plus $1$ incrementer $($eireuit$2-3.$cet$)$;

Include the above designs in your library file $($lib$.$clt$),$ I must be able to use these components in

your library file, or $50\%$ of the points will be lost. Implement the following Boolean function with an $1$ bit $4-$to$-1$ multiplexer and optionally, a single inverter:

$F(A,B,C)=m(2,4,6)$

You must ONLY use value$-$fixing and the components stated above. Save the circuit as circuit$3.$cct $.$

Implement the following Boolean function with a $3-$to$-8$ decoder:

$F(A,B,C)=m(1,2,3,6)$

You must ONLY use value$-$fixing and the components stated above. Save the circuit as circuit$4.$cct $.$

A parity checker is a component that verifies the parity of the entire input. For example, a $9$bit even parity

checker would be able to tell that $100010001$ contains error, while $000110000$ does not. Given $9$bit input

$A_{8}dots{A}_0,$ design an even parity checker that outputs $0$ when no error is found, and $1$ when there is$.$ You

should store the implemented component as a $9$bit Parity Checker in your library, and circuit as

circuit$5.$cct$.$

Implement an unsigned selective $2$ s complementer. It should take $4$ bits $A=A_{3}dots{A}_0$ and $C$ as input,

$D=D_{3}dots{D}_0$ as output. It should output A when $C=0,$ the unsigned $2$s complement of A when

$C=1.$ You should store the component as a $4$ bit $2s$ Comp in your library, and circuit as

circuit$6.$cct$.$