Question: Your project involves the design and implementation of a synchronous state machine using 1 or more PLDs to implement the functionality of the Tail -
Your project involves the design and implementation of a synchronous state machine using or more PLDs to implement the functionality of the TailLight System of the Thunderbird. Since your system will require a clock frequency of approximately Hz you must design an astable multivibrator with the appropriate frequency using a CounterTimer chip in advance of the Synchronous State Machine design. Because the timer is not capable of driving a large fanout, you must buffer the output using a Schmitt trigger buffer LS prior to its use in your circuit to provide a jitter free, noiseimmune clock signal. The output of your system should drive LEDs to emulate the tail section of the Thunderbird. Though you are free to use any design process, the following approach is suggested:
Develop your Timer to create a Hz clock signal with a Duty Cycle as close to as possible. Determine the required resistor and capacitor values necessary to implement your design based upon the components in your lab kit.
Examine the specification sheet for the LS Schmitt Trigger Inverter. Draw a circuit diagram with all necessary pinouts that implements your Timer and applies the Output of the Timer to the input of the LS Since the inverts your signal, use inverters in series to buffer the clock.
After examining Figure quantify the number of states necessary for the state machine, as well as the number of inputs and outputs to the system. Categorize the system as Mealy or Moore, again by observation.
Develop a State Diagram.
From the State Diagram, compute the minimum number of FlipFlops required.
Assign each of the observable external states to an internal machine state a unique FlipFlop output combination Although there are procedures for optimizing this assignment, for this exercise you may assign them arbitrarily.
Verify the State Diagram with your Instructor before proceeding any further.
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