Consider the multitransistor circuit in Figure 4.49. Assume transistor parameters of (V_{T N}=0.6 mathrm{~V}, k_{n}^{prime}=100 mu mathrm{A}

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Consider the multitransistor circuit in Figure 4.49. Assume transistor parameters of \(V_{T N}=0.6 \mathrm{~V}, k_{n}^{\prime}=100 \mu \mathrm{A} / \mathrm{V}^{2}\), and \(\lambda=0\). Design the transistors such that the small-signal voltage gain of the first stage is \(A_{v 1}=-10\) and the small-signal voltage gain of the second stage is \(A_{v 2}=0.9\).

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