Reed-Muller structure Consider the following logic function of 4 variables:

f = ab' d' + a c' d' + a' b c + b c d, and the two circuits implementing this function, as presented in Example 14.4: the SIGMA-PI structure, and the Reed-Muller implementation.

1. We consider the SIGMA-PI realization of this function. Analyze this circuit to find a test sequence as short as possible.

2. Check by inverse transformation (extraction of the logic function by analysis of the circuit) that the proposed Reed-Muller circuit realizes the specified function.

3. Check that the test sequence STI = (0l01, 1010, 1111) covers all the single stuck-at faults of the inputs / outputs of the gates.

4. Specialists of electronic design of XOR functions have proved that to activate all internal faults of such gates, it is necessary to apply all their input vectors. Check that the sequence TS2 = (0101, 1010, 1111,0111, 1001) satisfies this requirement, and that every internal error propagates to the output where it is observed.