Consider a phase-locked loop consisting of a multiplier, loop filter, and voltage controlled oscillator (VCO). Let the signal applied to the multiplier input be a PSK signal defined by s(t) = A_c cos [2πf_ct + k_pm(t)] where k_p is the phase sensitivity, and the data signal m(t) takes on the value + 1 for binary symbol 1 and – 1 for binary symbol 0. The VCO output is r(t) = A_c sin [2πf_ct + θ(t)]

(a) Evaluate the loop filter output, assuming that this filter removes only modulated components with carrier frequency 2f_c.

(b) Show that this output is proportional to the data signal m(t) when the loop is phase locked, that is, θ(t) = 0.