A circuit is to be built to add two 10-bit numbers x and y plus a carry in. (Bit 9 of each number is the most significant bit [MSB], and bit 0 is the least significant bit [LSB]. c₀ is the carry in to the LSB position.) The propagation delay of any individual AND or OR gate is 0.4 ns, and the carry and sum functions of each full adder are implemented in sum of products form.

a. If the circuit is implemented as a ripple carry adder, how much time will it take to produce a result?

b. Given that the carry generate and propagate functions for bit position i are given by g_i = x_iy_i and p_i = x_i + y_i, and that each required carry bit (c₁ … c₁₀) is developed from the least significant carry in c₀ and the appropriate g_i and p_i functions using AND-OR logic, how much time will a carry lookahead adder circuit take to produce a result?