Figure P7.12 from the text demonstrates the execution of a conditional branch instruction in a flow-through computer. The grayed out sections of the computer are not required by a conditional branch instruction. Can you think of any way in which these unused elements of the computer could be used during the execution of a conditional branch? 

Transcribed Image Text:

FIGURE P7.12 PC_MPLX BRA Target where the target address is [PC]+4+4*L MPLX BRA Target PC 00 PC 01 Branch 10 Jump 11 0 Z PC_MPLX control Architecture of a hypothetical computer PC address Instruction. Memory + PC adder PC data 32-bit branch target address 4 Opcode Literal Branch adder The Z-bit from the CCR controls the PC multiplexer. It selects between next address and branch address. Register file S1 address S2 address Daddress Ddata S1 data S2 data Sign extension Left shift x 2 ALU_MPLX 0 MPLX 32-bit sign-extended byte offset S1 data ALU S2data Load data 32-bit sign-extended word offset Memory address Data memory Maddress Mdata out Mdata in Memory_MPLX HO MPLX Cengage Leaming 2014