If the processor is already too expensive, instead of paying to speed it up as we did in 4.10.5, we want to minimize its cost without further slowing it down. If you can use slower logic to implement control signals, saving $1 of the processor cost for each 5ps you add to the latency of a single control signal, which control signals would you slow down and by how much to reduce the processor’s cost without slowing it down?

Problem 4.10.5

If you can speed up the generation of control signals, but the cost of the entire processor increases by $1 for each 5ps improvement of a single control signal, which control signals would you speed up and by how much to maximize performance? What is the cost (per processor) of this performance improvement?

The remaining problems in this exercise assume that the time needed by the control unit to generate individual control signals is as follows

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RegDst Jump Branch MemRead MemtoReg ALUOp MemWrite ALUSrc RegWrite 500ps 500ps 450ps 200ps b. 1100ps 1000ps 1100ps 800ps 450ps 200ps 500ps 100ps 500ps 1200ps 300ps 1300ps 400ps 1200ps a.