What needs to be done to support undefined instruction exceptions in your datapath from 4.34.1? Note that the undefined instruction exception should be triggered whenever the processor encounters any other kind of instruction.

Exercise 4.34.1

Describe a pipelined datapath needed to support only this instruction. Your datapath should be designed with the assumption that the only instructions that will ever be executed are instances of this instruction.

This exercise is designed to help you understand the discussion of the “Pipelining is easy. The first four problems in this exercise refer to the following MIPS instruction:

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a. b. Instruction AND Rd, Rs, Rt SW Rt, Offs (Rs) Interpretation Reg[Rd]=Reg[Rs] AND Reg[Rt] Mem[Reg[Rs]+Offs] Reg[Rt] =