Assume that the first six memory-reference instructions in the basic computer listed in Table 5-4 are to be changed to the instructions specified in the following table. EA is the effective address that resides in AR during time T₄. Assume that the adder and logic circuit in Fig. 5-4 can perform the exclusive-OR operation AC←AC⊕DR. Assume further that the adder and logic circuit cannot perform subtraction directly. The subtraction must be done using the 2's complement of the subtrahend by complementing and incrementing AC. Give the sequence of register transfer statements needed to execute each of the listed instructions starting from timing T₄. Note that the value in AC should not change unless the instruction specifies a change in its content. You can use TR to store the content of AC temporary or you can exchange DR and AC.

Table 5-4

Fig. 5-4

Symbol Opcode Symbolic designation XOR ADM 000 AC ACM[EA] 001 M[EA] M[EA] + AC AC ACM[EA] SUB XCH SEQ BPA 010 011 100 101 AC M[EA], M[EA] AC If (M[EA] = AC) then (PC PC + 1) If (AC > 0) then (PC+EA) Description in words Exclusive-OR to AC Add AC to memory Subtract memory from AC Exchange AC and memory Skip on equal Branch if AC positive and non-zero