Assume that the input logic of the microprogram sequencer of Fig. 7-8 has four inputs, I₂, I₁, I₀ T (test), and three outputs, S₁, S₀, and L. The operations that are performed in the unit are listed in the following table. Design the input logic circuit using a minimum number of gates.

Fig. 7-8

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1₂ h 0 x 1 0 1 0 1 1000 0 1 1 1 lo 10000 Operation Increment CAR if T = 1, jump to AD if T = 0 Jump to AD unconditionally Increment CAR unconditionally Jump to AD if T = 1, increment CAR if T = 0 Call subroutine if T = 1, increment CAR if T = 0 1 Return from subroutine unconditionally 1 Map external address unconditionally