What happens in the daisy-chain priority interrupt shown in Fig. 11-12 when device 1 requests an interrupt

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What happens in the daisy-chain priority interrupt shown in Fig. 11-12 when device 1 requests an interrupt after device 2 has sent an interrupt request to the CPU but before the CPU responds with the interrupt acknowledge?

Fig. 11-12

VAD 1 Device I PI PO PI Processor data bus VAD 2 Device 2 PO PI Interrupt request Device 3 VAD 3 Interrupt

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