A 4-bit magnitude comparator chip (e.g., 74LS85) compares two 4-bit numbers A and B and produces outputs to indicate whether A < B, A = B, or A > B. There are three output signals to indicate each of the foregoing conditions. Note that exactly one of the output lines will be high and the other two lines will be low at any time. The chip is a cascadable chip and has three inputs—A > B.IN, A = B.IN, and A < B.IN—in order to allow cascading the chip to make 8-bit or larger agnitude comparators.
(a) Draw a block diagram of a 4-bit magnitude comparator.
(b) Draw a block diagram to indicate how you can construct an 8-bit magnitude comparator using two 4-bit magnitude comparators.
(c) Write a behavioral Verilog description for the 4-bit comparator.
(d) Write Verilog code for the 8-bit comparator using two 4-bit comparators as components.