Assume that [A] = 0011 and [B] = 0010 in Figure 6-14. If ADD = 1 and
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Assume that [A] = 0011 and [B] = 0010 in Figure 6-14. If ADD = 1 and SUB = 0, determine the logic levels at the OR gate outputs.
Figure 6-14
Transcribed Image Text:
Transfer pulse BB₂ 0 12 B3 CLK Ag { B₂ B₂ 6 D B register 11 B₂ 01 CLK A₂ A₂ B₁ B₁ D 10 3₂ B₁ 74LS283 A₁ A₁ CLK B₁ B₂ 2 D 1 B₂ F Ao Ao CLK ADD SUB 13 12 11 10 Co
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Related Book For
Digital Systems Principles And Application
ISBN: 9780134220130
12th Edition
Authors: Ronald Tocci, Neal Widmer, Gregory Moss
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