1. Build the truth table for:

(a) a three-input AND gate.

(b) a four-input AND gate.

3–2. If we were to build a truth table for an eight-input AND gate, how many different combinations of inputs would we have?

3–3. Describe in words the operation of:

a) an AND gate.

(b) an OR gate.

3–4. Determine the logic level at W, X, Y and Z in Figure P3–4.

3–5. Write the Boolean equation for

(a) A three-input AND gate

(b) A four-input AND gate

(c) A three-input OR gate

3–6. Determine the logic level at W, X, Y and Z in Figure P3–6.

3–7. Sketch the output waveform at X for the two-input AND gates shown in Figure P3–7.

3–8. Sketch the output waveform at X for the two-input OR gates shown in Figure P3–8.

3–9. Sketch the output waveform at X for the three-input AND gates shown in Figure P3–9

3–28. For Figure P3–28, write the Boolean equation at X and Y and build a truth table for each.

3–29. Determine the logic levels at W, X, Y and Z in Figure P3–29.

3–31. Determine the logic level at W, X, Y and Z in Figure P3–31.

6–1. Describe in words the operation of an exclusive-OR gate and of an exclusive-NOR gate.

6–2. Describe in words the difference between

(a) An exclusive OR and an OR gate

(b) An exclusive NOR and an AND gate

6–3. Complete the timing diagram in Figure P6–3 for the exclusive-OR and the exclusive-NOR.

6–4. Write the Boolean equations for the circuits in Figure P6–4. Simplify the equations and determine if they function as an Ex-OR, Ex-NOR, or neither.

  
 
 
 
 
 
 
 
 

Transcribed Image Text:

1 Figure P3-4 D D W 0 0 D Œi 0 Z 1 Figure P3-4 D D W 0 0 D Œi 0 Z

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