Figure 8-52(a) shows a 74LS112 J-K flip-flop whose output is required to drive a total of eight standard TTL inputs. Because this exceeds the fan-out of the 74LS112, a buffer of some type is needed. Figure 8-52(b) shows one possibility using one of the NAND gates from the 74LS37 quad NAND buffer, which has a much higher fan-out than the 74LS112. Note that Q̅ is used because the NAND is acting as an INVERTER. Refer to the data sheet for the 74LS37.

(a) Determine its maximum fan-out to standard TTL.

(b) Determine its maximum sink current in the LOW state.

Figure 8-52

Transcribed Image Text:

J 74LS112 K Q TE 8 74XX STD TTL CLK (a) J 74LS112 CLK K O lo (b) 74LS37 buffer 8 74XX STD TTL