Question: Use the values from Table 8-9 to calculate the HIGH-state noise margin when a 74HC gate drives a standard 74LS input. Table 8-9 CMOS Parameter

Use the values from Table 8-9 to calculate the HIGH-state noise margin when a 74HC gate drives a standard 74LS input.


Table 8-9

CMOS Parameter 4000B 74HC 74HCT 74AC 74ACT 74AHC 3.5 3.5 2.0 3.5 2.0 3.85 1.5 1.0 0.8 1.5 0.8 1.65 4.95 4.9

CMOS Parameter 4000B 74HC 74HCT 74AC 74ACT 74AHC 3.5 3.5 2.0 3.5 2.0 3.85 1.5 1.0 0.8 1.5 0.8 1.65 4.95 4.9 4.9 4.9 4.9 4.4 0.05 0.1 0.1 0.1 0.1 0.44 1.45 1.4 2.9 1.4 2.9 0.55 1.45 0.9 0.7 1.4 0.7 1.21 VIH(min) VIL(max) VOH(min) VOL(max) VNH VNL 74AHCT 2.0 0.8 3.15 0.1 1.15 0.7 74 2.0 0.8 2.4 0.4 0.4 0.4 TTL 74LS 74AS 2.0 2.0 0.8 0.8 2.7 2.7 0.5 0.5 0.7 0.7 0.3 0.3 74ALS 2.0 0.8 2.5 0.5 0.7 0.4

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