Create a Verilog module named if 2 to 4 that represents a 2-to-4 binary decoder using an

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Create a Verilog module named if 2 to 4 that represents a 2-to-4 binary decoder using an if-else statement. Create a second module named h 3 to 8 that represents the 3-to-8 binary decoder in Figure 4.15 using two instances of the if2to4 module.

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