Question: Implement the function in Figure 2.31 using only NAND gates. X1 0 0 0 0 1 1 1 1 x2 0 0 1 1 0

Implement the function in Figure 2.31 using only NAND gates.

X1 0 0 0 0 1 1 1 1 x2 0 0

X1 0 0 0 0 1 1 1 1 x2 0 0 1 1 0 0 1 1 X3 0 1 0 1 0 1 0 1 f 0 1 1 0 1 0 0 1

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