Assume that the transfers with handshaking shown in Figure 11-8 are between a CPU on the left and an I/O interface on the right. There is an address coming from the CPU for each of the transfers, both of which are initiated by the CPU.

(a) Draw block diagrams, showing interconnections for the transfers.

(b) Draw the timing diagrams, assuming that the address must be applied some time before the request becomes 1 and removed some time after the request becomes 0.

Figure 11-8

Transcribed Image Text:

Destination unit Data bus Request Reply Data bus Request Reply Source unit Databus Request Reply (a) Destination-initiated transfer Data bus Request Reply (b) Source-initiated transfer Source unit Destination unit