The following components are provided: A 6-bit binary counter, with Clock and Clear inputs and six outputs A 3-bit serial-input-parallel-output shift register A clock running at eight times the input data rate Logic gates and D flip-flops with Preset and Clear controls Design a circuit using these components to load 3 bits of serial data from an input data line into the shift register. Assume the data to have the format of Figure 10.3, but with only 3 bits of data instead of 8. The circuit you design should have two outputs, A and B, both initially cleared to 0. Output A should be set to 1 if a Stop bit is detected following the data bits. Otherwise, output B should be set to 1. Give an explanation of the operation of your design.

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