$11.$ a$)(5)$ When a dependent instruction is stalled in stage $2$ of our MIPS pipeline, the

instruction ahead of it in stage $3$ is allowed to advance. Hence, in the next clock cycle, stage

$3$ will be empty. This empty stage is called a pipeline bubble. Indicate what operation is

performed by the ALU when a bubble is in the execute stage. Is the ALU operation

performed when the bubble is in the execute stage the same as the ALU operation

performed when a nop machine instruction is in the execute stage? Explain your answer.

b$)(5)$ The following instruction sequence executes on our MIPS pipeline with both a data

hazard unit and a data forwarding unit:

ori $$2,$ $$0,5$

addiu $$4,$ $$2,21$

sll $$0,$ $$4,3$

add $$6,$ $$4,$ $$0$

Recall that data forwarding can avoid stalling a dependent instruction since any stale

register value the dependent instruction uses can be replaced by the forwarded value when

the dependent instruction is in the execute stage. Identify all instructions in the sequence

above that require one or more forwarded values. For each instruction that you identify,

indicate the register whose contents must be replaced by the forwarded value and indicate

which instruction produces the value that is forwarded.