$12\mathrm{.}1\mathrm{.}1$ Give the total delay of the full adder shown in Fig. $12\mathrm{.}2$ if all gates have a delay of $1$ ns $.$

$12$

Fig. $12\mathrm{.}2$

Full adder timing exercise

$12\mathrm{.}1\mathrm{.}2$ Give the total delay of the full adder shown in Fig. $12\mathrm{.}2$ if the XOR gates have delays of $5$ ns $,$ while the AND and OR gates have delays of $1$ ns $.$