1. ADD [R1], R2, [R3]; Here [R1] and [R3] indicate memory locations pointed by R1 and R3 register respectively. Here the operand field next to opcode will hold the result at the end. Assume that the machine code of this instruction is loaded at address 1020H of the main memory. Also assume that the contents of registers R1, R2 and R3 are 2001H, 2002H and 2003H respectively. Moreover, 1000H, 2000H and 3000H are saved at memory addresses 2001H, 2002H and 2003H respectively. a) Draw a schematic diagram of a CPU, show its important functional units required to process this instruction. b) Show the interfacing between CPU and Memory indicating the size of address bus and data bus. Assume that the CPU can read 2Bytes in a single bus cycle. c) Show the instruction format, if the processor has 16 registers and 32 instructions in its instruction set. Assume that this is the 5th instruction of the instruction set. d) List the steps CPU carries out to process this instruction. e) Show the contents of each register and m