1. Consider the function given below, f(x1,X2, X3, x4) = > m(0,2,4,5,8,10,13) Please : just e,f,g,h...

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1. Consider the function given below, f(x1,X2, X3, x4) = > m(0,2,4,5,8,10,13) Please : just e,f,g,h (a) Write the f function according to the given minterms. (b) Draw gate-level schematic of this function using only NOR gates. (c) Realize this function with CMOS transistors and draw transistor-level schematic. (d) Consider the circuit designed in (c), find (W/L)neq and (W/L)p,eq of the equivalent CMOS inverter circuit for simultaneous switching of all inputs, assuming that (W/L), = 3 for all NMOS transistors and (W/L), = 4 for all PMOS transistor. (e) Design a CMOS inverter in order to obtain f function where (W/L)ninv = (W/L)n,eq. (W/L)p,inv = (W/L)p,eq. Vro,n = 0.75 V, Vro,p = -0.45, k, = 155 µA/V?, k, = 250 µA/ V?, Vpp = 5 V and assume l = 0, by computing Von. Vor, Vn, and Vn for given parameters. %3! %3D (f) Plot the Voltage Transfer Characteristic (VTC) of the CMOS inverter by indicating critical voltage values determined in (e). (g) Consider the CMOS inverter in (e), determine the noise margins NM, and NMH- (h) Calculate the actual propagation delay time TPHL, actual and TPLH.actuat of the inverter in (e) by assuming output load capacitance 1.75 pF and T, = 1 ns and Ty = 0.5 ns for non-ideal square wave input signal. 1. Consider the function given below, f(x1,X2, X3, x4) = > m(0,2,4,5,8,10,13) Please : just e,f,g,h (a) Write the f function according to the given minterms. (b) Draw gate-level schematic of this function using only NOR gates. (c) Realize this function with CMOS transistors and draw transistor-level schematic. (d) Consider the circuit designed in (c), find (W/L)neq and (W/L)p,eq of the equivalent CMOS inverter circuit for simultaneous switching of all inputs, assuming that (W/L), = 3 for all NMOS transistors and (W/L), = 4 for all PMOS transistor. (e) Design a CMOS inverter in order to obtain f function where (W/L)ninv = (W/L)n,eq. (W/L)p,inv = (W/L)p,eq. Vro,n = 0.75 V, Vro,p = -0.45, k, = 155 µA/V?, k, = 250 µA/ V?, Vpp = 5 V and assume l = 0, by computing Von. Vor, Vn, and Vn for given parameters. %3! %3D (f) Plot the Voltage Transfer Characteristic (VTC) of the CMOS inverter by indicating critical voltage values determined in (e). (g) Consider the CMOS inverter in (e), determine the noise margins NM, and NMH- (h) Calculate the actual propagation delay time TPHL, actual and TPLH.actuat of the inverter in (e) by assuming output load capacitance 1.75 pF and T, = 1 ns and Ty = 0.5 ns for non-ideal square wave input signal.