1. Consider the single stage CPU represented in the diagram. Complete the control line table below for the given instructions by entering 0, 1, or x for "don't care".

Instruction #1: sltu $t0,$t1,$t2 Instruction #2: 10101100011000100000000000010100 Instruction #3: sh $t0,$t1,100 Instruction #4: beq $t0,$t1,L1 Instruction #5: 0x0B090001

	RegDst	Branch	MemRead	MemtoReg	MemWrite	ALUSrc	RegWrite
#1
#2
#3
#4
#5

2. For each instruction in part 1, what would be the values of the ALUop and ALU control input lines? Be sure to include only the proper number of bits for each.

0 Add Add ALU result Shift left 2 RegDst Branch MemRead MemtoRe Instruction [31-26] Control ALUO MemWrite ALUSrc RegWrite Instruction [25-21] Read Read register 1 Read Instruction [20-1 Read data 1 Read PCaddress Zero ALU ALU result Instruction register 2 31-0] Read Address data M Write Instruction Instruction [15-11]x regiS Write 0 memory Ul data Registers Write Data data memor Instruction [15-0] 16 Sign- ALU control extend Instruction [5-0] 0 Add Add ALU result Shift left 2 RegDst Branch MemRead MemtoRe Instruction [31-26] Control ALUO MemWrite ALUSrc RegWrite Instruction [25-21] Read Read register 1 Read Instruction [20-1 Read data 1 Read PCaddress Zero ALU ALU result Instruction register 2 31-0] Read Address data M Write Instruction Instruction [15-11]x regiS Write 0 memory Ul data Registers Write Data data memor Instruction [15-0] 16 Sign- ALU control extend Instruction [5-0]