$1.$ Design, implement, and simulate a modulo $8$ counter as described in problem A$\mathrm{.}39$ in Appendex A$.$ A$39.$ Construct a $3-$bit counter using three D flipflops and a selection of gates. The inputs should consist of a signal that resets the

counter to $0,$ called reset, and a signal to increment the counter, called inc. The

outputs should be the value of the counter. When the counter has value $7$ and is

incremented, it should wrap around and become $0$