1. For the machine instruction BD57, the op-code field is and the operand field is Write the instruction as an actual 16-bit pattern. 16 points) 2. Suppose a block of data is stored in the memory cells of the machine described in Appendix C from address 47 to 52, inclusive. List their memory addresses. (5 points) 3. Assume that the machine described in Appendix Cuses memory-mapped I/O and that the address B5 is the location within the printer port to which data to be printed should be sent. If register 8 contains the ASCII code for the letter A, what machine language instruction should be used to cause that letter to be printed at the printer? (5 points 4 Perform the indicated operations: (5 points cach) (a) 00110011 (b) 00110011 XOR 11001011 AND 11011001 (C) OR 11000111 01010001 5. Translate the following instruction into machine language described in Appendix C. (5 points each) (1) OR the bit patterns found in register 3 and register 4 and place the result in register 5. (2) ROTATE the bit pattern in register B one bit to the right 3 times. 6. Suppose you want to complement the right 4 bits of a byte and leave the other 4 bits unchanged. What mask must you use together with what operation? (5 points 7. Performing a 3-bit right circular shift (rotation) on the following bit pattern. (S points 00101110 8. Suppose the memory cells at addresses 50 through 53 in the machine described in Appendix C contain the following bit patterns. (points) Address Contents 50 11 51 70 52 69 a. What is the 1" instruction that will be executed if we start the machine with its program counter containing 507 b. What is the instruction that will be executed if we start the machine with its program counter containing 51? The Machine Language in Appendix C 1RXY LOAD the register R with the bit pattern found in the memory cell whose address is XY 2RXY LOAD the register R with the bit pattern XY. 3RXY STORE the bit pattern found in register R in the memory cell whose address is XY 40RS MOVE the bit pattern found in register R to register S. SRST ADD the bit patterns in register S and T and as though they were two's complement representations and leave the result in register R. 6RST ADD the bit patterns in register S and T and as though they represent values in floating-point notation and leave the result in register R. 7RST OR the bit patterns in registers and T and place result in register R. 8RST AND the bit patterns in registers and T and place result in register R. 9RST XOR the bit patterns in registers and T and place result in register R. AROX ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low order end at the high order end. BRXY JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in the register number 0. Otherwise, continue with normal sequence of execution. C000 HALT execution. Hexadecimal table Hexadecimal Bit Pattern Representation Bit Pattem Hexadecimal Representation 8 9 0000 0001 0010 0011 0100 0101 0110 0111 1 2 3 4 1000 1001 1010 1011 1100 1101 1110 1111 D E F