1.) Interfaces to memory and I/O devices are made through

a. Central Switch

b. Buses

c. Data Links

d. All of the Above

2.) Which of the following cache organization would result in the most bits for tag assuming the cache block size must remain unchanged?

a. Direct-mapped

b. Fully-associative

c. Set-associative

d. None of the above

3.) If a cache has 16K cache lines, and each line can store 8-byte memory data, which cache organization will require the most bits per cache line provided that the needs for the LRU, error detection, etc. remain the same?

a. Direct-mapping

b. Fully-associative

c. 2-way associative

d. 4-way associative

4.) Split caches indicate separate:

a. L1 & L2 cache

b. L2 & L3 cache

c. Data and Instruction cache

d. None of the above

5.) Victim caching helps what type of cache architecture?

a. Fully-associative

b. Direct Mapped

c. Set-associative

d. None of the above