1. Latency, Throughput, Speedup, and The Iron CPU Performance Law (a) Consider three different CPUs, P1,...

 

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1. Latency, Throughput, Speedup, and The Iron CPU Performance Law (a) Consider three different CPUs, P1, P2, and P3, implementing the same ISA and each executing a program P. The performance data for each CPU is given in the table below. CPU Frequency CPI Instruction Count Program Latency P1 3GHz 1.5 20G P2 2.5GHz 1.0 30G P3 4GHz 2.2 90G 7s 10s 9s For questions (i)-(iii), ignore the instruction count and program latency columns in the table. i. Which CPU has the highest performance expressed in instructions per second? ii. Suppose the CPUs each execute program P in 10 seconds. Compute the number of clock cycles each CPU takes to execute program P and the dynamic instruction count executed by each CPU. iii. The goal is to reduce the program's latency by 30% but this leads to an increase of 20% in the CPI for each CPU when executing program P. What clock frequency should each CPU have to achieve this latency reduction? 1. Latency, Throughput, Speedup, and The Iron CPU Performance Law (a) Consider three different CPUs, P1, P2, and P3, implementing the same ISA and each executing a program P. The performance data for each CPU is given in the table below. CPU Frequency CPI Instruction Count Program Latency P1 3GHz 1.5 20G P2 2.5GHz 1.0 30G P3 4GHz 2.2 90G 7s 10s 9s For questions (i)-(iii), ignore the instruction count and program latency columns in the table. i. Which CPU has the highest performance expressed in instructions per second? ii. Suppose the CPUs each execute program P in 10 seconds. Compute the number of clock cycles each CPU takes to execute program P and the dynamic instruction count executed by each CPU. iii. The goal is to reduce the program's latency by 30% but this leads to an increase of 20% in the CPI for each CPU when executing program P. What clock frequency should each CPU have to achieve this latency reduction?