$1.$ Part $1$: $3$ or $4$ same inputs circuit.

$1.$ The circuit will have $4$ inputs $($w$,$ x$,$ y$,$ z$)$ and will output a $1$ when at least $3$ of the $4$ inputs

have the same value. Note this does not say if the inputs are a $1$ or a $0,$ just that they are

the same.

$2.$ First, create a truth table showing the relationship between $4$ inputs and the outputs.

$$ Write your truth table in Excel and save the file as Lab$3$Part$1.$xlsx$.$ You will be

submitting this.

$3.$ Then use a K$-$Map or algebraic manipulation to achieve the optimal circuit for the truth table.

$$ Write the map in the same Excel file you use for the truth table, Lab$3$Part$1.$xlsx$.$

$4.$ Create a Logisim project for this circuit and save it as Lab$3$Part$1.$circ.

$5.$ Draw the circuit obtained in step $3$ after using K$-$Map on paper. Then merge an AND gate

and an NOT gate into a NAND gate. I.e$.,$ distribute the bubbles $($little circles$)$ to get the NAND

equivalent circuit.

$$ You may ONLY use $2-$input NAND, $3-$input NAND, and $4-$input NAND for this

circuit. NO OTHER GATES, including NOT gates, ARE ALLOWED. No marks will be

given if you don$$t follow these restrictions.

$$ Note: NAND gates are not cascade$-$able $($not extendable$)$ in the same way as AND and OR

from the last lab, so the extension to multiple inputs you used for the AND and the OR will

not work for the NAND.

$6.$ Draw on Logisim the circuit you designed and simulate it$.$

$$ How many Data Bits $($input size$)$ should you use for the inputs?

$$ Recall, you are trying to validate that all possible combinations of values are validated,

so definitely will be more than one. In fact, you will be trying to get the truth table in

Logisim.