1. Sequential Network: a) The following is the next state table of a sample state network (SN) with one input X, having 4 states Complete the following table assuming the final system will be using S-R latches (F/F). Make sure that "do not care" is indicated by using "*." Input C-State Next-state c2 c1 N2 N1 S2 R2 S1 R1 0 0 0 0 1 1 1 1 b) Use K-map technique to minimize the two functions N2 and N1(These are outputs) 2. Memory Use a S-R latch building block and external logic gates to realize a D-F/F (latch)