$1.$Suppose we have a system with a virtual memory space of $1$Gbytes and a physical memory space of $256$Mbytes for paging.

a$.$If the page size is $4$Kbytes, how many pages are available for caching? Provide both virtual and physical amounts.

b$.$How many entries are in the page table for a process?

c$.$ How many bits of the virtual address are in the virtual page offset?

d$.$ How many bits are in the physical page number?

e$.$ What is a translation lookaside buffer $($TLB$)?$ How does it speed up translations of virtual addresses to physical addresses