Question: 1. Write program (in pseudo assembler code) for register-register (load/store) architecture CPU witch does: a = b + c d = e f and optimize

1. Write program (in pseudo assembler code) for register-register (load/store) architecture CPU witch does: a = b + c d = e f and optimize this program in pipeline (to avoid hazard stalls).

2. Please show all pipeline hazards. Load [100] , Rc Fi Di Co Fo Ei W Load [101], Rb Add Rc, Rb, Ra Store Ra, [102] Jump [200] Load [104], Rd Div Rd, Ra, Rd

3. Memory is divided in 32 blocks, cache size is 8 blocks. In which cache slot should be put block nr 20 if cache organization is: a. direct mapped b. 2 -way set associative

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