10. (18 pts total) With virtual memory, every memory reference needs to be translated from virtual to physical address, dynamically. Mapping is done on a page basis. If the mapping is not found in the TLB, the processor "walks" the page table and the role of the offset. Let us consider a system with 32-bit addresses and 4KB pages. Each page table entry comprises 4 bytes (32 bits). (a) (4 pts) Draw picture of 32-bit virtual to physical address translation using a two-level page table (as shown in class). Your figure should include arrows to show how fields of the virtual address are used as indices into the page table. You do not need to include the TLB here, only walking of the page table structure.