Question: [1+1+1+1+1] (b) Consider the following 8051 interfacing problem. 8051 ADC0804 +5V RD Voc P2.5 P2.6 WR CLKR CLK IN Sl? P1.0 DO 10k POT A

[1+1+1+1+1] (b) Consider the following 8051 interfacing problem. 8051 ADC0804 +5V

[1+1+1+1+1] (b) Consider the following 8051 interfacing problem. 8051 ADC0804 +5V RD Voc P2.5 P2.6 WR CLKR CLK IN Sl? P1.0 DO 10k POT A GND Vref/2 D GND P1.7 D7 P2.7 INTR CS The delay between consecutive analog to digital conversion will be dynamically adjusted. If the analog reading (Varala) goes >= VCC/2, delay is 40 ms while if goes

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