$2\mathrm{.}1$ Exercise $1$

Clock Frequency Divider $2\mathrm{.}1$ Exercise $1$

Clock Frequency Divider

Police Siren: Design a circuit that generate a $1Hz$ output signal using Behavioral Model. This

signal is connected to $2$ RGB LEDs $(1$ displays the blue color, $1$ display the red color$)$ on Arty$-$Z$7$ FPGA

Faculty of Computer Science and Engineering

Department of Computer Engineering

Board to make it blink interleave with each other $($turn on for $0\mathrm{.}5s-$ turn off for $0\mathrm{.}5s).$ Know that the

input clock frequency is $125MHz.$

Write test benches to simulate the circuits.

Test the circuits on FPGA board using LEDs and RGB LED.Police Siren: Design a circuit that generate a $1$ Hz output signal using Behavioral Model. This signal is connected to $2$ RGB LEDs $(1$ displays the blue color, $1$ display the red color$)$ on Arty$-$Z$7$ FPGA

Board to make it blink interleave with each other $($turn on for $0\mathrm{.}5$s $-$ turn off for $0\mathrm{.}5$s$).$ Know that the input clock frequency is $125$ MHz$.$

Write test benches to simulate the circuits.

Test the circuits on FPGA board using LEDs and RGB LED.