Question: 2 ) ( 2 0 % ) XL 0 8 Consider a MIPS processor with five stage pipeline that includes hardware provisions for forwarding and

2) (20 %)

08

Consider a MIPS processor with five stage pipeline that includes hardware provisions for forwarding and stalling. For the following code provide a hardware solution for hazards with minimal number of static or dynamic stalls. : lw $t

1, 20 (

2)

add $t

1,

2,

3

sub $t

2,

1,

3

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