$(25$ points$)$ Design a simple pipelined microprocessor: instructions are of the form $"a=b$ op $c",$ where

operands a and $b$ are memory locations, operand $c$ is a provided value, and op is the operation: $+,-,$ AND,

OR$.$ To execute one instruction, follow this process:

Cycle $1$: Fetch b from memory using the read memory port; note that b$\text{'}$s value won't be available

until the next clock cycle.

Cycle $2$: Now that b$\text{'}$s value is fetched, perform the operation of $($b value$)$ add$/$subtract$/$AND$/$OR

c$\_$value.

Cycle $3$: Store the result of the operation using the write memory port.

Use pipelining to start executing a new instruction every clock cycle.

typedef enum logic

ADD,

SUBTRACT,

AND,

OR

$\}$ operation$\_$t;

module spring$\_$exam$\_2\_$problem$\_3($

input logic clk$,$

The address of each operand.

input logic $[15$:$0]$ a$\_$address,

input logic $15$:$0$ b$\_$address,

The value for operand $c.$

input logic $15$:$0$ c$\_$value,

The operation.

input operation$\_$t operation,

The read memory port: one cycle after setting the address, the data for this address is valid.

output logic $[15$:$0]$ read$\_$address,

input logic $[15$:$0]$ read$\_$data,

The write memory port: the provided data is written to the given address every clock cycle.

output logic $[15$:$0]$ write$\_$address,

output logic $15$:$0$ write$\_$data

;