$(25\%)$ Using CircuitVerse, create the LSFR circuit.

a$.$ After creating the circuit, make sure to initialize the circuit by toggling the 'preset$\_02\text{'}$ and 'reset' input.

i$.$ Note: The 'splitter' can be found in the 'Misc' tab and should be created as follows:

Enter Bit Width: $16$

Enter bit split: $1111111111111111$

b$.$ You can control the CLK input by toggling the $\text{'}$clk$\_$enable' input.

c$.$ Make a list of the first $10$ numbers generated by the circuit.

d$.$ Hand in your list of numbers in both binary and hexadecimal format.

$(75\%)$ Export the Verilog code for this circuit using the 'Export Verilog' feature in the Tools tab.

a$.$ Both the testbench code and the Verilog circuit code should be contained within the file that you download.

b$.$ Separate out the design file and the testbench file so you can simulate the circuit using the EDA playground.

c$.$ You will need to edit the testbench and write code to toggle the reset and preset and enable the clock.

d$.$ You will need to edit the design file so that the DD flipflop works the same as it does in CircuitVerse $($code to use the 'preset$\_023\text{'}$ signal must be integrated into the 'reset' if statement$).$

e$.$ Run a simulation to generate $10$ numbers

f$.$ Hand in your list of numbers in both binary and hexadecimal format.

g$.$ Hand in a timing diagram of your simulation