$2.$ Assume the data cache has space for only eight blocks of data, where block consists of

only one $16-$bit word of data and main memory is word addressable with $16$ bit

addresses. Assume that a $4$ x $10$ array of numbers called A$,$ each occupying one word,

is stored in memory location $7$A$00$ through $7$A$27($hex$).$ The elements of array A are

stored in row major order. Now consider the following pseudo code to compute the

average of the elements in the first row and divide each element of first row by that

average.

SUM$=0$

for j$=0$ to $9$ do

SUM$=$ SUM$+$ A $(0,$ j$)$

end

AVE$=$ SUM$/10$

For i$=9$ down to $0$ do

A $(0,$ i$)=$A $(0,$ i$)/$AVE

End

i$)$ Show the content of cache after each pass if an associative mapped cache is used that

uses LRU replacement algorithm. Assume that cache is initially empty. Find the

number of bits required for each of the TAG, BLOCK and WORD fields.

ii$)$ Repeat part $($i$)$ for a four way set associative cache. Find the number of bits required

for each of the TAG, SET and WORD fields.

Calculate hit and miss ratio for $($i$)$ and $($ii$)$