Question: 2. Recall from Section 9.2.3 that caches use the middle range of address bits as the set index and the high order bits as the

2. Recall from Section 9.2.3 that caches use the middle range of address bits as the set index and the high order bits as the tag. Why is this done? How might cache performance be affected if the middle bits were used as the tag and the high order bits were used as the set index?

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