2. Up/Down Counter: Design a circuit that has a k bit output Y and has inputs: CLK, and two bits

F1F0. Depending on F1F0, the system should perform the following functionality: F1 F0 Y

00 Yprev 01 Yprev + 1 10 Yprev ? 1 11 0

should be considered in 2s complement form with k bits.

(i.e., Y increases its value by 1) (i.e., Y decreases its value by 1)

(i.e., Y is reset to equal the 2s complement k-bit binary representation of 0) Design the system using D flip-flops and additional primitives of combinational logic. The output Y