29. Upon the receipt of an interrupt, the processor stops executing the current instruction. 30. What happens if two interrupts from two different devices are sent to the process a. True b. False time? a. There will be an interrupt collision and none of'them will be executed b. Both will be executed at the same time The one with higher priority will be executed first d. c. The one with shorter ISR, will be executed first 31. DMA controler deteriorates a computer performande because i allows for direst tram from LO devices to memory a. True b. False 32. When large volumes of data are to be moved from Lo devices which of the following VO operation techniques is preferred? a Programmed (polled) b. Interrupt driven c. Direct memory access(DMA) d. Direct Transfer 33. Which of the following is suitable for processing the /O of a CD? a. Programmed VO b. Interrupt-driven LVO c. DMA d. channel VO 34. Write code to implement the expression: "A (B/C)-Don3-, 2, 1- and 0-address machines 1-address O-address 3-address 2-address and L2 cache. The L1 cache miss rate is 10%, and cache access time is 4 ns. The L2 cache hit rate is 2%, and cache access time is 15 ns. The main memory access time is 150 ns. 35Calculate average memory access time AMAT with L