Question: 2.(a) Write VHDL code to implement the following functions. f = ac + a 0 c 0 + bd + b 0 d 0 g

2.(a) Write VHDL code to implement the following functions.

f = ac + a 0 c 0 + bd + b 0 d 0

g = abc0 d 0 + a 0 b 0 cd + ab0 c 0 d + a 0 bcd0

(b) Use CAD tool based functional simulation to check if f = g 0 . Demonstrate CAD simulation to TA for checkoff.

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