3. ( 5+10=15pts) Suppose that we designed a processor called MX not LC3), which has 16 registers and 120 opcodes in its instruction set architecture (ISA). a) What is the minimum number of bits required to represent the opcode in an instruction? b) If a 24-bit MX instruction has the following format (not drawn to scale), where DEST, SRC1, and SRC2 parts are the bits used to represent registers. i) What is the minimum number of bits required to represent the SRC1? ii) What is the maximum number of UNUSED bits in the instruction encoding? 4. (15 pts) The PC at any time during execution in LC- 3 contains 3010 and the following memory locations contain values as shown: If the following three LC-3 instructions are executed, which values will be loaded into R